Difference between revisions of "Synthetic Cell, Summer 2020"

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| Jeremiah S || 15 Jun || CSUN || decision-making || Richard, Melissa T || [[http:drive.google.com/file/d/1YyrRW-xNZQ32suNR87qTm1nzO-Y9gNRy|Genelet circuits]] ||
| Jeremiah S || 15 Jun || CSUN || decision-making || Richard, Melissa T || [[http:drive.google.com/file/d/1YyrRW-xNZQ32suNR87qTm1nzO-Y9gNRy|Genelet circuits]] ||
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| Nazmus S || 15 Jun || Oxford || decision-making || Richard, Ayush || [[http:docs.google.com/presentation/d/1lP59cv6VYSDj_vwefvxacUJBSrx6kBunYzyEwU9rOBI|Genelet logic gates]] ([[ http:github.com/Chryron/GeneletLogicGate|GitHub]]) ||  
| Nazmus S || 15 Jun || Oxford || decision-making || Richard, Ayush || [[http:docs.google.com/presentation/d/1lP59cv6VYSDj_vwefvxacUJBSrx6kBunYzyEwU9rOBI|Genelet logic gates]] ([[ http:github.com/Chryron/GeneletLogicGate|GitHub]]) || Peter B
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| Peter B || 15 Jun || U. South Carolina || regulation || Richard, Manisha || [[http:drive.google.com/file/d/1nVu9_Qpvem3Qmk8oAZC8RXx3vvJt8mjh|Temperature compensation of synthetic circuits]] || Ayush B
| Peter B || 15 Jun || U. South Carolina || regulation || Richard, Manisha || [[http:drive.google.com/file/d/1nVu9_Qpvem3Qmk8oAZC8RXx3vvJt8mjh|Temperature compensation of synthetic circuits]] || Ayush B, Nazmus S
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Revision as of 16:42, 29 July 2020

Name Start Date Location Subsystem Mentor, co-mentor(s) Project [summary, git] Integrations
Agrima D 11 May IIT Delhi input/export, chassis Richard, Ayush, David, Zoila DNA export and liposome merging Albert A, Ankita R
Albert A 15 Jun Lund input/export, materials processing Richard, Zoila Distributed metabolic pathways Agrima A
Ankita R 15 Jun Caltech energy Richard, Ayush, David, William ATP regeneration (metabolism) (GitHub) Agrima
Ayush B 11 May IIT Delhi sensing Richard, Shaunak Sen Temperature dependent circuits Peter B
Christian Z 15 Jun Caltech design tools Richard, ? CelloCAD, logic circuits
Jeremiah S 15 Jun CSUN decision-making Richard, Melissa T Genelet circuits
Nazmus S 15 Jun Oxford decision-making Richard, Ayush Genelet logic gates (GitHub) Peter B
Peter B 15 Jun U. South Carolina regulation Richard, Manisha Temperature compensation of synthetic circuits Ayush B, Nazmus S