Edit Paper: Parallelizing Synthesis from Temporal Logic Specifications by Identifying Equicontrollable States

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Title*:	Parallelizing Synthesis from Temporal Logic Specifications by Identifying Equicontrollable States
Authors*:	Sumanth Dathathri, Ioannis Filippidis and Richard M. Murray
Source*:	2019 International Symposium on Robotics Research (ISRR)
Abstract*:	For the synthesis of correct-by-construction control policies from temporal logic specifications the scalability of the synthesis algorithms is often a bottleneck. In this paper, we parallelize synthesis from specifications in the GR(1) fragment of linear temporal logic by introducing a hierarchical procedure that allows decoupling of the fixpoint computations. The state space is partitioned into equicontrollable sets using solutions to parameterized reachability games that arise from decomposing the original GR(1) game into smaller reachability games. Following the partitioning, another synthesis problem is formulated for composing the strategies from the decomposed reachability games. The formulation guarantees that composing the synthesized controllers ensures satisfaction of the given GR(1) property. Benchmarking experiments with robot planning problems demonstrate good scalability of the approach.
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