EECI 2012: Computer Session: TuLiP: Difference between revisions
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{{ | {{eeci-sp12 header|prev=Protocol Synthesis|next=RHTLP}} | ||
This lecture provides an overview of TuLiP, a Python-based software toolbox for the synthesis of embedded control software that is provably correct with respect to a GR[1] specifications. TuLiP combines routines for (1) finite state abstraction of control systems, (2) digital design synthesis from GR[1] specifications, and (3) receding horizon planning. The underlying digital design synthesis routine treats the environment as adversary; hence, the resulting controller is guaranteed to be correct for any admissible environment profile. TuLiP applies the receding horizon framework, allowing the synthesis problem to be broken into a set of smaller problems, and consequently alleviating the computational complexity of the synthesis procedure, while preserving the correctness guarantee. | This lecture provides an overview of TuLiP, a Python-based software toolbox for the synthesis of embedded control software that is provably correct with respect to a GR[1] specifications. TuLiP combines routines for (1) finite state abstraction of control systems, (2) digital design synthesis from GR[1] specifications, and (3) receding horizon planning. The underlying digital design synthesis routine treats the environment as adversary; hence, the resulting controller is guaranteed to be correct for any admissible environment profile. TuLiP applies the receding horizon framework, allowing the synthesis problem to be broken into a set of smaller problems, and consequently alleviating the computational complexity of the synthesis procedure, while preserving the correctness guarantee. | ||
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== Lecture Materials == | == Lecture Materials == | ||
* Lecture slides: [http://www.cds.caltech.edu/~ | * Lecture slides: [http://www.cds.caltech.edu/~murray/courses/eeci-sp12/C2_tulip-17May12.pdf TuLiP] (Exercises are at the end of the slides.) | ||
* MATLAB plotting: [http://www.cds.caltech.edu/~murray/courses/eeci-sp12/plotRobotSim.m plotRobotSim.m], [http://www.cds.caltech.edu/~murray/courses/eeci-sp12/plotCarSim.m plotCarSim.m] | |||
* [http://www.cds.caltech.edu/~murray/courses/eeci-sp12/tulip_examples.zip Example TuLiP files] (zip file): | |||
** 6 cell robot, discrete state space: [http://www.cds.caltech.edu/~murray/courses/eeci-sp12/robot_discrete_simple.py robot_discrete_simple.py] | |||
** 6 cell robot, with dynamics: [http://www.cds.caltech.edu/~murray/courses/eeci-sp12/robot_simple.py robot_simple.py], [http://www.cds.caltech.edu/~murray/courses/eeci-sp12/robot_simple2.py robot_simple2.py] (alternative formulation) | |||
== Further Reading == | == Further Reading == | ||
* <p>TuLiP: A Software Toolbox for Receding Horizon Temporal Logic Planning, T. Wongpiromsarn, U. Topcu, N. Ozay, H. Xu and R. M. Murray, Hybrid Systems: Computation and Control, 2011. </p> | * <p>[http://www.cds.caltech.edu/~murray/papers/2010n_wtoxm11-hscc.html TuLiP: A Software Toolbox for Receding Horizon Temporal Logic Planning], T. Wongpiromsarn, U. Topcu, N. Ozay, H. Xu and R. M. Murray, Hybrid Systems: Computation and Control, 2011. </p> | ||
== Additional Information == | == Additional Information == | ||
* <p>[http:// | * <p>[http://sourceforge.net/apps/mediawiki/tulip-control/index.php?title=Main_Page TuLiP on SourceForge] </p> | ||
* <p>[ | * <p>[http://tulip-control.sourceforge.net/doc/ TuLiP Documentation] and [http://tulip-control.sourceforge.net/doc/install.html Installation instructions] </p> | ||
* <p>[http://jtlv.ysaar.net/ JTLV Project Home Site] JTLV provides the framework for the underlying digital design synthesis routine used in TuLiP. </p> | * <p>[http://jtlv.ysaar.net/ JTLV Project Home Site] JTLV provides the framework for the underlying digital design synthesis routine used in TuLiP. </p> | ||
Latest revision as of 07:38, 17 May 2012
| Prev: Protocol Synthesis | Course home | Next: RHTLP |
This lecture provides an overview of TuLiP, a Python-based software toolbox for the synthesis of embedded control software that is provably correct with respect to a GR[1] specifications. TuLiP combines routines for (1) finite state abstraction of control systems, (2) digital design synthesis from GR[1] specifications, and (3) receding horizon planning. The underlying digital design synthesis routine treats the environment as adversary; hence, the resulting controller is guaranteed to be correct for any admissible environment profile. TuLiP applies the receding horizon framework, allowing the synthesis problem to be broken into a set of smaller problems, and consequently alleviating the computational complexity of the synthesis procedure, while preserving the correctness guarantee.
A brief overview of TuLiP will be followed by hands-on exercises using the toolbox.
Lecture Materials
- Lecture slides: TuLiP (Exercises are at the end of the slides.)
- MATLAB plotting: plotRobotSim.m, plotCarSim.m
- Example TuLiP files (zip file):
- 6 cell robot, discrete state space: robot_discrete_simple.py
- 6 cell robot, with dynamics: robot_simple.py, robot_simple2.py (alternative formulation)
Further Reading
TuLiP: A Software Toolbox for Receding Horizon Temporal Logic Planning, T. Wongpiromsarn, U. Topcu, N. Ozay, H. Xu and R. M. Murray, Hybrid Systems: Computation and Control, 2011.
Additional Information
JTLV Project Home Site JTLV provides the framework for the underlying digital design synthesis routine used in TuLiP.
